What is scan insertion?

Scan insertion is a design-for-testability (DFT) technique used in integrated circuit (IC) design to improve the testability of a chip after manufacturing. It involves adding scan chains, which are essentially long shift registers, to the chip's internal flip-flops. During testing, these scan chains can be used to shift test data into the flip-flops and shift out the results, allowing for easy observation and control of the internal state of the chip. This makes it much easier to detect manufacturing defects that might not be easily detected through functional testing alone. Scan insertion typically involves replacing the original flip-flops with scan flip-flops, which have additional multiplexer circuitry to allow for both normal operation and scan mode.